Embedded System Tutorial Interrupts - Revision history

Preet: Replaced content with "Socialledge is moving to two portals. * The Wiki will remain here for general references about the SJ-One board, and to document student reports. * The bookstack will..."

2018-03-01T16:38:14Z

Replaced content with "Socialledge is moving to two portals. * The Wiki will remain here for general references about the SJ-One board, and to document student reports. * The bookstack will..."

Isa team: /* Assignment */

2018-02-07T07:57:18Z

‎Assignment

Preet: /* Setup ISR on SJ-One */

2015-03-22T23:22:46Z

‎Setup ISR on SJ-One

Preet at 16:35, 5 March 2014

2014-03-05T16:35:50Z

Preet: /* Assignment */

2014-02-10T22:46:32Z

‎Assignment

Preet: /* Assignment */

2014-02-10T22:44:21Z

‎Assignment

Preet at 22:43, 10 February 2014

2014-02-10T22:43:24Z

Preet: /* ISR processing inside a FreeRTOS Task */

2013-12-03T17:03:31Z

‎ISR processing inside a FreeRTOS Task

Preet: /* Setup ISR on SJ-One */

2013-12-03T17:02:33Z

‎Setup ISR on SJ-One

Preet: /* ISR Procedure */

2013-12-02T21:10:16Z

‎ISR Procedure

@@ Line 1: / Line 1: @@
-== Introduction ==
+Socialledge is moving to two portals.
-This tutorial demonstrates how to use interrupts on a processor.  In general, you will understand the concept behind interrupts on any processor, but we will use the SJ-One board as an example.
+*  The Wiki will remain here for general references about the SJ-One board, and to document student reports.
-=== What is an interrupt? ===
+[http://books.socialledge.com/books/embedded-drivers-real-time-operating-systems/chapter/lesson-interrupts This article has been moved here]

← Older revision		Revision as of 07:57, 7 February 2018
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	#* You must CLEAR the source of interrupt by using either IO0IntClr or IO2IntClr otherwise your interrupt will go to an infinite loop.		#* You must CLEAR the source of interrupt by using either IO0IntClr or IO2IntClr otherwise your interrupt will go to an infinite loop.
	#* You cannot use <B><CODE>printf()</CODE></B> to print anything from inside an ISR (if FreeRTOS is running), but you can use the API from <B><CODE>printf_lib.h</CODE></B>		#* You cannot use <B><CODE>printf()</CODE></B> to print anything from inside an ISR (if FreeRTOS is running), but you can use the API from <B><CODE>printf_lib.h</CODE></B>
		+
		+	[[Embedded System Tutorial Interrupts Assignment]]

@@ Line 91: / Line 91: @@
+     }
+}
 </syntaxhighlight>
 <BR/>
 == Assignment ==
 Write the implementation of <B><CODE>eint.c</CODE></B> from scratch.  Before you get any ideas, and to make sure you are not biased, just erase this file and begin with an empty mind.

@@ Line 74: / Line 74: @@
 <syntaxhighlight lang="c">
 /* Declare and create the semaphore in main() */
-xSemaphoreHandle gButtonPressSemaphore = NULL;
+SemaphoreHandle_t gButtonPressSemaphore = NULL;
 void my_button_press_isr(void)

← Older revision		Revision as of 22:46, 10 February 2014
Line 108:		Line 108:
	# Hints:		# Hints:
	#* LPC_GPIOINT structure can configure rising or falling edges for Port0 and Port2		#* LPC_GPIOINT structure can configure rising or falling edges for Port0 and Port2
		+	#* You must CLEAR the source of interrupt by using either IO0IntClr or IO2IntClr otherwise your interrupt will go to an infinite loop.
		+	#* You cannot use <B><CODE>printf()</CODE></B> to print anything from inside an ISR (if FreeRTOS is running), but you can use the API from <B><CODE>printf_lib.h</CODE></B>

@@ Line 97: / Line 97: @@
 Write the implementation of <B><CODE>eint.c</CODE></B> from scratch.  Before you get any ideas, and to make sure you are not biased, just erase this file and begin with an empty mind.
-#  From the <B><CODE>startup.cpp</CODE></B> file, identify the name of the function for EINT2
+#  From the <B><CODE>startup.cpp</CODE></B> file, identify the name of the function for EINT3
 #*  This interrupt function is used for Port0 and Port2 interrupts
-#*  When either EINT2, Port0, or Port2 interrupt occurs, this function will execute
+#*  When either EINT3, Port0, or Port2 interrupt occurs, this function will execute
 #  Allow the user to specify the pin number and a callback function.
 #*  When the interrupt occurs, make the callback for the user function

← Older revision		Revision as of 22:43, 10 February 2014
Line 92:		Line 92:
	}		}
	</syntaxhighlight>		</syntaxhighlight>
		+
		+	<BR/>
		+	== Assignment ==
		+	Write the implementation of <B><CODE>eint.c</CODE></B> from scratch. Before you get any ideas, and to make sure you are not biased, just erase this file and begin with an empty mind.
		+
		+	# From the <B><CODE>startup.cpp</CODE></B> file, identify the name of the function for EINT2
		+	#* This interrupt function is used for Port0 and Port2 interrupts
		+	#* When either EINT2, Port0, or Port2 interrupt occurs, this function will execute
		+	# Allow the user to specify the pin number and a callback function.
		+	#* When the interrupt occurs, make the callback for the user function
		+	# Test your implementation
		+	#* Attach a couple of switches on Port2, and ensure that the callbacks are made correctly.
		+	#* If SW1 is pressed, it should go to callback1
		+	#* If SW2 is pressed, it should go to callback2
		+	# Hints:
		+	#* LPC_GPIOINT structure can configure rising or falling edges for Port0 and Port2

← Older revision		Revision as of 17:02, 3 December 2013
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	* Most important: Clear the source of the interrupt		* Most important: Clear the source of the interrupt
	*: For example, if interrupt was for rising edge of a pin, clear the "rising edge" bit such that you will not re-enter into the same interrupt function.		*: For example, if interrupt was for rising edge of a pin, clear the "rising edge" bit such that you will not re-enter into the same interrupt function.
		+
		+	=== ISR processing inside a FreeRTOS Task ===
		+	It is a popular scheme to have an ISR quickly exit, and then resume a task or thread to process the event. For example, if we wanted to write a file upon a button press, we don't want to do that inside an ISR because it would take too long and block the system. What we can do instead is have the ISR "give" a semaphore, and a task to block upon a semaphore.
		+
		+	What you may argue with the example below is that we do not process the ISR immediately, and therefore delay the processing. But you can tackle this scenario by resuming a HIGHEST priority task. Immediately, after the ISR exits, due to the ISR "yield", FreeRTOS will resume the high priority task immediately rather than servicing another task.
		+
		+	<syntaxhighlight lang="c">
		+	/* Declare and create the semaphore in main() */
		+	xSemaphoreHandle gButtonPressSemaphore = NULL;
		+
		+	void my_button_press_isr(void)
		+	{
		+	long yield = 0;
		+	xSemaphoreGiveFromISR(gButtonPressSemaphore, &yield);
		+	portYIELD_FROM_ISR(yield);
		+	}
		+
		+	void button_press_task(void *p)
		+	{
		+	while(1) {
		+	if (xSemaphoreTake(gButtonPressSemaphore, portMAX_DELAY)) {
		+	/* Process the interrupt */
		+	}
		+	}
		+	}
		+	</syntaxhighlight>
		+	</syntaxhighlight>

@@ Line 12: / Line 12: @@
 The following steps demonstrate what happens when an interrupt occurs :
 *  CPU manipulates the PC (program counter) to jump to the ISR
-*  IMPORTANT: CPU will disable interrupts (or that priority level's interrupts until end of ISR)
+*  '''IMPORTANT''': CPU will disable interrupts (or that priority level's interrupts until end of ISR)
 *  Registers are saved before running the ISR (pushed onto the stack)
 *  ISR is run
@@ Line 18: / Line 18: @@
 *  Interrupts are re-enabled (or that priority level's interrupt is re-enabled)
-On some processors, the savings and restoring of registers is a manual step and the compiler would help you do it.  You can google "GCC isr attribute" to study this topic further.  On SJ-One board, which uses LPC17xx (ARM Cortex M3), this step is automatically taken care of by the CPU hardware.
+On some processors, the savings and restoring of registers is a manual step and the compiler would help you do it.  You can google "GCC interrupt attribute" to study this topic further.  On SJ-One board, which uses LPC17xx (ARM Cortex M3), this step is automatically taken care of by the CPU hardware.
 === The SW to HW Connection ===